;***************************************************************************** ;* * ;* WIRE COMMUNICATION LIBRARY HEADER * ;* * ;* com.inc * ;* * ;* FirstEdition 1998/06/11 S.Maekawa * ;* * ;***************************************************************************** ;***************************************************************************** ;* CONSTANT DEFINITION * ;***************************************************************************** COM_POINTER_HEAD equ 0x00 ;wire comm buffer pointer initialization COM_SEND_BUF_MAX equ 0x3f ;wire comm transmission buffer max value COM_READ_BUF_MAX equ 0x37 ;wire comm reception buffer max value COM_BUF_OVER equ 0xff ;wire comm buffer over COM_BUF_EMPTY equ 0x01 ;wire comm buffer empty COM_BUF_OK equ 0x00 ;wire comm buffer normal COM_COUNTER_ZERO equ 0x00 ;wire comm counter 0 COM_SEND_FLG_OK equ 0x00 ;wire comm transmission flag OK COM_ERROR_INIT equ 0x00 ;wire comm error flag initialization COM_SEND_FLG_NG equ 0xff ;wire comm transmission flag NG COM_READ_FLG_OK equ 0x00 ;wire comm reception flag OK COM_READ_FLG_NG equ 0xff ;wire comm reception flag NG COM_INTTX0_ON equ 0xe8 ;only INTTX0 set to level 6 COM_INTRX0_ON equ 0x8e ;only INTRX0 set to level 6 COM_INTTX0RX0_ON equ 0xee ;INTRX0 and INTTX0 set to level 6 COM_INTTX0RX0_OFF equ 0x88 ;INTRX0 and INTTX0 set to mask COM_BUFOVERERROR equ 0y00000001 ;communication buffer over COM_FLAMEERROR equ 0y00000010 ;communication frame error COM_PARITYERROR equ 0y00000100 ;communication parity error COM_OVERRUNERROR equ 0y00001000 ;communication overrun error COM_INTRX equ 0x6fe4 ;reception interrupt vector set COM_INTTX equ 0x6fe8 ;transmission interrupt vector set ;************************ COMMUNICATION BIOS VECTOR DEFINED *************************** VECT_COMINIT equ 0x10 ;serial comm initialization BIOS VECT_COMSENDSTART equ 0x11 ;transmission start BIOS VECT_COMRECIVESTART equ 0x12 ;reception start BIOS VECT_COMCREATEDATA equ 0x13 ;create transmission data BIOS VECT_COMGETDATA equ 0x14 ;obtain reception data BIOS VECT_COMONRTS equ 0x15 ;RTS signal allow BIOS VECT_COMOFFRTS equ 0x16 ;RTS signal disallow BIOS VECT_COMSENDSTATUS equ 0x17 ;obtain transmission status BIOS VECT_COMRECIVESTATUS equ 0x18 ;obtain reception status BIOS VECT_COMCREATEBUFDATA equ 0x19 ;obtain transmitted data buffer BIOS VECT_COMGETBUFDATA equ 0x1a ;write out recieved data buffer BIOS ;***************************************************************************** ;************************* HARDWARE DEFINE **************************** COM_TXD0_OUT equ 0y00000001 ;communication TxD0 (channel 0) output COM_SCLK0_OUT equ 0y00000100 ;communication SCLK0 (channel 0) output COM_TXD1_OUT equ 0y00001000 ;communication TxD1 (channel 1) output COM_SCLK1_OUT equ 0y00100000 ;communicaiton SCLK1 (channel 1) output COM_TXD0_PULLUP equ 0y00000001 ;communication TxD0 (channel 0) Pull-Up COM_SCLK0_PULLUP equ 0y00000100 ;communication SCLK0 (channel 0) Pull-Up COM_TXD1_PULLUP equ 0y00000001 ;communication TxD1 (channel 1) Pull-Up COM_SCLK1_PULLUP equ 0y00000001 ;communication SCLK1 (channel 1) Pull-Up COM_P8_ALL_PULLUP equ 0y00111111 ;communication port 8 all Pull-Up COM_TO2_ON equ 0y01111100 ;communication TO2 trigger use COM_BRG_ON equ 0y00000001 ;communication baud generator use COM_ICLK_ON equ 0y00000010 ;communication internal clock phi 1 use COM_SCLK0_ON equ 0y00000011 ;communication external clock use COM_IO_IF_MODE equ 0y01110011 ;communication I/O interface mode COM_UART7_MODE equ 0y00000100 ;communication 7 bit long UART mode COM_UART8_MODE equ 0y00001000 ;communication 8 bit long UART mode COM_UART9_MODE equ 0y00001100 ;communication 9 bit long UART mode COM_UART9_WAKEUP_DS equ 0y01101111 ;comm 9 bit long UART mode WAKEUP disabled COM_UART9_WAKEUP_EN equ 0y00010000 ;comm 9 bit long UART mode WAKEUP enabled COM_REQUEST_OFF equ 0y01011111 ;communication reception disallowed COM_REQUEST_ON equ 0y00100000 ;communication reception allowed COM_CTS_DISABLE equ 0y00111111 ;communication hand shake CTS disabled COM_CTS_ENABLE equ 0y01000000 ;communication hand shake CTS enabled COM_IO_IF_BRG equ 0y11111110 ;comm I/O interface mode baud generator COM_IO_IF_SCLK0 equ 0y00000001 ;comm I/O interface mode SCLK0 terminal COM_SCLK0_UP equ 0y11111101 ;comm SCLK0 input startup edge COM_SCLK0_DOWN equ 0y00000010 ;comm SCLK0 input stand down edge COM_ERROR_BIT equ 0y00011100 ;communication error bit COM_FLAMEERROR_BIT equ 0y00000100 ;communication frame error COM_PARITYERROR_BIT equ 0y00001000 ;communication parity error COM_OVERRUNERROR_BIT equ 0y00010000 ;communication over run error COM_PARITY_DISABLE equ 0y11011111 ;communication parity addition disabled COM_PARITY_ENABLE equ 0y00100000 ;communication parity addition enabled COM_PARITY_ODD equ 0y10111111 ;communication parity odd (Odd) COM_PARITY_EVEN equ 0y01000000 ;communication parity even (Even) COM_SC0CR_CLEAR equ 0y00000000 ;communication SC0CR register clear COM_1_16_CLK equ 0y11110000 ;comm baud rate generator 16 cycle value COM_1_15_CLK equ 0y00001111 ;comm baud rate generator 15 cycle value COM_1_14_CLK equ 0y00001110 ;comm baud rate generator 14 cycle value COM_1_13_CLK equ 0y00001101 ;comm baud rate generator 13 cycle value COM_1_12_CLK equ 0y00001100 ;comm baud rate generator 12 cycle value COM_1_11_CLK equ 0y00001011 ;comm baud rate generator 11 cycle value COM_1_10_CLK equ 0y00001010 ;comm baud rate generator 10 cycle value COM_1_9_CLK equ 0y00001001 ;comm baud rate generator 9 cycle value COM_1_8_CLK equ 0y00001000 ;comm baud rate generator 8 cycle value COM_1_7_CLK equ 0y00000111 ;comm baud rate generator 7 cycle value COM_1_6_CLK equ 0y00000110 ;comm baud rate generator 6 cycle value COM_1_5_CLK equ 0y00000101 ;comm baud rate generator 5 cycle value COM_1_4_CLK equ 0y00000100 ;comm baud rate generator 4 cycle value COM_1_3_CLK equ 0y00000011 ;comm baud rate generator 3 cycle value COM_1_2_CLK equ 0y00000010 ;comm baud rate generator 2 cycle value COM_1_1_CLK equ 0y00000001 ;comm baud rate generator 1 cycle value COM_CLK_T0 equ 0y11001111 ;comm BRG internal input clock phi T0 (4/fc) COM_CLK_T2 equ 0y00010000 ;comm BRG internal input clock phi T2 (16/fc) COM_CLK_T8 equ 0y00100000 ;comm BRG internal input clock phi T8 (64/fc) COM_CLK_T32 equ 0y00110000 ;comm BRG internal input clock phi T32 (256/fc) COM_TRUN_ON equ 0y10000000 ;communication internal timer count start COM_RTS_OFF equ 0y00000001 ;communication RTS OFF(High) COM_RTS_ON equ 0y11111110 ;communication RTS ON(Low) ;*****************************************************************************